The world’s insatiable demand for computing is having a global impact. I will discuss two outstanding challenges in computing: the memory wall or communication wall, and computing’s carbon footprint. My approach to overcome these challenges leverages three-dimensional integrated circuits (3D ICs). I will present a 3D embedded DRAM to address the memory wall, and show how we model the carbon footprint of 3D ICs. I will also discuss 3D Electronic-Photonic ICs to address the communication wall.
This event is part of the Joint MIT AI Hardware Program and Microsystems Technology Laboratories Seminar Series.
Speaker
Gage Hills
Gage Hills is a 4th year assistant professor in EE at Harvard. He finished his PhD at Stanford in 2018 and was a post-doc at MIT until 2021. He now leads the Nano-Design Research Group: https://nanodesign.seas.harvard.edu/. As a recent research highlight, the work he will describe in this talk was nominated for a Best Paper Award at the DATE 2025 conference.
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